Taraate, Advanced HDL Synthesis and SOC Prototyping.
Taraate, Advanced HDL Synthesis and SOC Prototyping.
Taraate, Vaibbhav: Advanced HDL Synthesis and SOC Prototyping. RTL Design Using Verilog. Singapore, Springer, 2019. XXI, 307 p. Hardcover. Versand aus Deutschland / We dispatch from Germany via Air Mail. Einband bestoßen, daher Mängelexemplar gestempelt, sonst sehr guter Zustand. Imperfect copy due to slightly bumped cover, apart from this in very good condition. Stamped.
Unser Preis: EUR 20,-- |